1. Field of the Invention
The present invention relates to a level shifter and operational amplifier, and more particularly, to a level shifter and operational amplifier capable of turning down or off an internal switch and increasing output current quickly.
2. Description of the Prior Art
In traditional circuit design, a level shifter is used to adjust the voltage level of a signal for successive components' operation. For example, digital components operating on digital signals require a voltage level exceeding 1.2V for determining the logic value correctly. However, the voltage level of the original signal may be merely 250 mV. Therefore, a level shifter is required to adjust the voltage level for digital components' normal operation.
FIG. 1 depicts a diagram of a traditional level shifter 100. The level shifter 100 comprises a level adjusting module 101 and a signal receiving module 103. The signal receiving module 103 is configured to receive a differential input signal which comprises a first input signal Vin+ and a second input signal Vin−. The level adjusting module 101 generates an adjusted signal Vo according to the differential input signal. The level adjusting module 101 comprises a first transistor Tr1 and a second transistor Tr2. A control end TCTr1 of the first transistor Tr1, a control end TCTr2 of the second transistor Tr2, and a second end T2Tr2 of the second transistor Tr2 are jointly coupled to a connection point T. The signal receiving module 103 comprises a first switch SW1 and a second switch SW2. A control end TCSW1 of the first switch SW1 and a control end TCSW2 of the second switch SW2 receive the first and the second input signal Vin+ and Vin−, respectively. Conductive status of the first switch SW1 and the second switch SW2 is determined according to the first and the second input signal Vin+ and Vin−, respectively.
In such a circuit design, the second transistor Tr2 is always in a conducting state, i.e., current always flows through the second transistor Tr2. FIG. 2 shows a diagram of current of the traditional level shifter. The horizontal axis represents time and the vertical axis represents current I flowing through the first switch SW1 or the second switch SW2. As shown in FIG. 2, the curve C1 denoted by a dashed line represents an ideal value of current I, and the curve CR denoted by a line represents a real value of current I. In the ideal situation, the current I rises to a predetermined value Iw and drops to zero quickly. However, in a real situation, since the second transistor Tr2 cannot be coupled to ground quickly, the voltage of the connection T cannot, as a consequence, fall to zero quickly. The current rises and falls slowly and the rising and falling time is delayed. Moreover, when the first Tr1 is not conducting, a small amount of current still flows through the second transistor Tr2 continuously. Because the rising and falling of current is slow and there is always current flowing through the second transistor Tr2, the sum of current flowing through the first transistor Tr1 and the second transistor Tr2 (i.e., the hatched area shown in FIG. is large during one time unit. As is well-known to those ordinary skilled in the art, the power consumption of components is related to the sum of current flowing through the components. Hence, the power consumption of the level adjusting module 101 in the circuit design shown in FIG. 1 is large. In addition, the phenomena of delayed current rising and falling may also degrade the overall performance of the circuit design.
From the above it is clear that the prior art still has shortcomings. Thus, there is a need in the industry for a novel technique that solves the aforementioned problems.